On-Chip Power Supply Noise and Reliability Analysis for Multi-Gigabit I/O Interfaces (PDF)
نویسندگان
چکیده
Verifying the power supply quality of the interface PHY is crucial to achieve multiGigabit data rates. The nature of high-speed interfaces, which are large mixed-signal fullcustom designs, are challenging for commercial EDA tools. We are presenting an on-chip supply analysis flow that allows us to analyze supply noise analysis even for large interface designs with high accuracy. This analysis flow provides information for static IR drop and transient AC noise waveforms and accurate predicts supply noise for every device location. The results are further used to predict the impact of supply noise on the system margin of the interface.
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